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Add-Drop Multiplexers (ADM)
Chronos - Industry definitions
Category: Travel and Transportation
Date & country: 30/11/2007, UK
Plesiochronous and lower bit rate synchronous signals can be extracted from or inserted into high speed SDH bit streams by means of ADMs. This feature makes it possible to set up ring structures, which have the advantage that automatic back-up path switching is possible using elements in the ring in the event of a fault.
The systematic change in frequency of an oscillator with time. NB - It is the frequency drift when factors external to the oscillator environment, power supply, temperature, etc.) are kept constant. An ageing value should always be specified together with the corresponding duration.
The short-term variations between the optimum sampling instants of a digital signal and sampling clock derived from it.
A mode where clocks are intended to operate in free running mode.
Autonomous PRC's are PRC's with one or several (up to three) Caesium tubes incorporated in the PRC and used as a reference for an SSU. The free run accuracy of PRC must be 1 x 10-11 according to G.811 or EN 300 462-6-1.
A Synchronisation link where the corrective action to maintain locking is active at both ends of the link.
Emulating Circuit performance over a Cell or Packet based networks for example a 2.048Mbit/s circuit transported over and ATM or IP based networks.
An equipment that provides a timing signal. NB - The word 'clock' generally means, when used for Synchronisation networks, the generator of the frequencies which will be used to synchronise the network.
The clock-source quality-level of a SDH Equipment Clock (SEC) or Stand Alone Synchronisation Equipment (SASE) is defined as the grade of clock to which it is ultimately traceable; i.e. The grade-of-clock to which it is synchronised directly or indirectly via a chain of SEC's, and SASE's however long this chain of clocks is. For example, the clock-sâ€¦
A role an RNC can take with respect to a specific set of UTRAN access points. There is only one Controlling RNC for any UTRAN access point. The Controlling RNC has the overall control of the logical resources of its UTRAN access points.
Digital Cross-Connexts (DXC)
This network element allows mapping of PDH tributary signals into virtual containers as well as switching of various containers up to and including VC-4.
Errors may occur at points of signal regeneration as a result of timing signals being displaced from their optimum positions in time.
An Access Point Base Station - sometimes called a 'femtocell', is a scalable, multi-channel, two-way communication device extending a typical base station by incorporating all of the major components of the telecommunications infrastructure. A typical example is a UMTS access point base station containing a Node-B, RNC and SGN with only an Ethernetâ€¦
Fractional Frequency Deviation
The difference between the actual frequency of a signal and a specified nominal frequency, divided by the nominal frequency.
Where a frame aligner is used, a slip will consist of the insertion or removal of a consecutive set of digits amounting to a frame. In the case of frame structures defined in Recommendation G.704 the lip can consist of one complete frame. It is of importance that the maximum and mean delays introduced by the frame aligner should be as small as possâ€¦
Free Run Mode
A clock is said to be in free run mode when its output signal is strongly influenced by the oscillating element and not controlled by servo phase-locking techniques. In this mode the clock has never had a network reference input, or the clock has lost external reference and has no access to stored data, that could be acquired from a previously connâ€¦
The maximum magnitude of the fractional frequency deviation for a specified time period. NB - The frequency accuracy includes the initial frequency offset and any ageing and environmental effect.
An underlying offset in the long-term frequency of a timing signal from its ideal frequency.
The rate of change of the fractional frequency deviation from a specified nominal value, caused by ageing and external effects (radiation, pressure, temperature, humidity, power supply, load, etc.).
The spontaneous and/or environmentally caused frequency change within a given time interval.
A generator, the output of which is used as a frequency reference.
The Galileo positioning system is a proposed satellite navigation system, to be built by the European Union (EU) as an alternative to GPS (which is controlled by the United States military) and the Russian GLONASS. The system should be operational by 2010, two years later than originally anticipated.
The upper limit in a buffer above which the data is not allowed to go. Normal process is that if the data reaches the high watermark, the clock-out frequency is speeded up so that the buffer begins to empty. Causes loads of wander.
The largest offset between a slave clock's reference frequency and a specified nominal frequency, within which the slave clock maintains lock as the frequency varies arbitrarily slowly over the frequency range.
An operating condition of a clock which has lost its controlling reference input and is using stored data, acquired while in locked operation, to control its output. The stored data are used to control phase and frequency variations, allowing the locked condition to be reproduced within specifications. Holdover begins when the clock output no longeâ€¦
This category of operation reflects the performance of a clock under conditions in which there are no impairments on the input reference timing signal.
The purpose of intra-nodal Synchronisation is to supply a Synchronisation reference signal to all pieces of equipment co-located e.g. In one building. The reference signals are generated in a node clock which is usually a SASE with a quality according to G.812 or EN 300 462-4-1. The SASE is synchronized to a reference signal coming from a PRC via iâ€¦
See 'J' (jitter)
The short-term variations of the significant instants of a timing signal from their ideal positions in time (where short-term implies that these variations are of frequency greater than or equal to 10 Hz).
Every digital input interface must tolerate a certain amount of jitter before bit errors or synchronisation errors occur. Tolerance masks are therefore specified for the permissible jitter amplitudes at various jitter frequencies.
If the input signal to a network element contains jitter, jitter will also be present at the output. The jitter transfer function (JTF) of a network element indicates the degree to which the output is affected by the input jitter, ie . whether the jitter is amplified or attenuated. Passage through the network element normally suppresses the high-frâ€¦
The part of the telephone line from a subscriber's premises to the telephone company's local exchange.
A synchronous network node which interfaces directly with customer equipment.
An operating condition of a slave clock in which the output signal is controlled by an external input reference such that the clock's output signal has the same long-term average frequency as the input reference, and the time error function between output and input is bounded. Locked mode is the expected mode of operation of a slave clock.
LOng RAnge Navigation is a terrestrial navigation system using low frequency radio transmitters that use the time interval between radio signals received from three or more stations to determine the position of a ship or aircraft. The current version of LORAN in common use is LORAN-C, which operates in the low frequency 90 to 110 kHz band. Many natâ€¦
The lower limit in a buffer below which the data is not allowed to go . Normal process is that if the data reaches the low watermark, the clock-out frequency is slowed down so that the buffer begins to fill.
See 'J' (jitter)
A generator which generates an accurate frequency signal for the control of other generatorsThe Master Clock in a telecom network is known as a Primary Reference Clock or PRC.
Master Slave Mode
A mode where a designated master clock is used as a frequency standard which is disseminated to all other clocks which are slaved to the master clock.
Measurement Reference Timing Signal
A timing signal of specified performance used as a time base for clock characterisation measurements. The basic assumption is that its performance must be significantly better than the clock under test with respect to the parameter being tested, in order to prevent the test results being compromised. The performance parameters of the frequency stanâ€¦
If something can go wrong it will.
Mutually Synchronised Mode
A mode where all clocks exert a degree of control on each other.
Engineer involved with packet based IP data, routers etc. who does not understand the necessity for synchronisation . Beware VoIP and other CBR traffic over your packet environment.
A generic concept that depicts the way of distributing a common time and/or frequency to all elements in a network.
A clock distributing Synchronisation to one or more synchronised equipment.
The ability of a network element e.g. SSU to withstand a noisy input signal and still perform to specification.
See 'J' (jitter)
Perturbations in phase of limited duration. E.g. Pointers on an E1 out of an SDH network.
Phase variation is commonly separated into three components: jitter, wander and effects of frequency offsets and drifts. In addition, phase discontinuities due to transient disturbances such as network re-routing, automatic protection switching, etc., may also be a source of phase variation.
A mode where the essential characteristic of time scales or signals such that their corresponding significant instants occur at nominally the same rate, any variation in rate being constrained within specified limits.
The user of pointers gives SDM networks a distinct advantage over the plesiochronous hierarchy. Pointers are used to localise individual virtual containers in the payload of the synchronous transport module. The pointer may directly indicate a single VC-n virtual container from the upper level of the STM-1 frame. Chained pointer structures can alsoâ€¦
PRC Autonomy Period
The PRC Autonomy (Period) is the period of time over which a clock, after it disqualified all its reference inputs, can restrict its phase drift within the bounds given by the network limits for Synchronisation signals.
PRC-Level refers to the collection of PRC compliant clocks in an operator domain that are the master clocks for the different Synchronisation areas when the Synchronisation network does not experience failures.
Providing end to end connectivity over a packet based network modelling the service that would be provided using a directly connected wire. The service emulated could be a ethernet connection or a TDM type service. TDM transport over Pseudo Wires is also known as circuit emulation or TDMoIP
A mode where all clocks have a long-term frequency accuracy compliant with a primary reference clock as specified in G.811 or EN 300 462-6-1 under normal operating conditions. Not all clocks in the network will have timing traceable to the same PRC.
The largest offset between a slave clock's reference frequency and a specified nominal frequency, within which the slave clock will achieve locked mode.
Radio Controlled PRC
Radio-controlled PRC's are PRC's which use remote Caesium tubes, e.g. In the satellites of the GPS navigation system. In this case radio signals are generated on the basis of Caesium tubes, received at the location of the PRC and used as the reference signal for an SSU. Two types of radio controlled PRC's exist, land based and satellite based radioâ€¦
Reference Timing Signal
A timing signal of specified performance that can be used as a timing source for a slave clock.
A Retimer allows the retiming of traffic (E1) data so that this data is timed by another clock rather than by its own clock source. This function can be implemented by writing a recovered signal into an elastic store (buffer) and time the output of that elastic store with another clock source, e.g. SDH line clock or local PRS (GPS) or SSU.
SDH Transport Mechanism
The process of transporting PDH and ATM signals over the SDH network is called mapping. The container is the basic package unit for tributary channels. A special container (C-n) is provided for each PDH tributary signal. These containers are always much larger than the payload to be transported. The remaining capacity is used partly for justificatiâ€¦
SEC sub-network refers to a collection of SEC clocks in SDH network elements interconnected by STM-N reference carriers. When engineering the synchronisation in a SEC sub-network, the directly connected SSU's need also to be considered.
SEC-Level refers to the collection of SEC compliant clocks in a Synchronisation area and their interconnections. SSU's are not part of the SEC-Level.
A role an RNS can take with respect to a specific connection between an UE and UTRAN. There is one Serving RNS for each UE that has a connection to UTRAN. The Serving RNS is in charge of the RRC connection between a UE and the UTRAN. The Serving RNS terminates the Iu for this.
Single Ended Synchronisation
A method of synchronising a specified Synchronisation node with respect to another Synchronisation node, in which Synchronisation information at the specified node is derived from the phase difference between the local clock and the incoming digital signal from the other node.
A clock whose timing output is phase-locked to a reference timing signal received from a higher quality clock.
The repetition or deletion of a block of bits in a synchronous or plesiochronous bit stream due to a discrepancy in the read and write rates at a buffer.
SSU-Level refers to the collection of SSU compliant clocks in a Synchronisation area and their interconnections. SEC's are not part of the SSU-Level, but are considered to be transparent on connections between SSU's . Under failure free conditions, there is only one interconnected SSU-level in a Synchronisation area.
A frequency with a known relationship to a frequency standard.
This category of operation reflects the actual performance of a clock considering the impact of real operating (stressed) conditions. Stressed conditions include the effects of jitter, protection switching activity and the loss of the input reference timing signal.
Stuffing and Wait Time Jitter
See 'J' (Jitter)
The geographic area in which all equipment which needs to operate synchronously is synchronised to the one master-clock in that area.
An active interconnection of Synchronisation nodes and links.
A clock providing timing services to connected network elements. This would include clocks conforming to G.811, G.812 and G.813 or EN 300 462-4-1, EN 300 462-5-1, EN 300 462-6-1 and EN 300 462-7-1.
Synchronisation interfaces are synchronous (i.e. Normally PRC-traceable). The network limits for Synchronisation interfaces are specified using MTIE and TDEV parameters with values given in EN 300 462-3-1. The input jitter and wander tolerance of clock equipment ports is specified in G812 or EN 300 462-4-1 and EN 300 462-7-1 (for equipment containiâ€¦
A link between two Synchronisation nodes over which Synchronisation is transmitted.
A network to provide reference timing signals. In general, the structure of a Synchronisation network comprises Synchronisation network nodes connected by Synchronisation links.
Synchronisation Network Node
A group of equipment in a single physical location which is directly timed by a node clock. NB - A physical location may contain more than one Synchronisation network node.
A Synchronisation node consists of an SSU and all co-located SEC's directly synchronised from that SSU.
Synchronisation Reference Chain
A specific Synchronisation chain to form the basis for simulations of jitter and wander in the Synchronisation network.
The destination of timing in a Synchronisation trail.
The source of timing in a Synchronisation trail.
A series of Synchronisation elements and Synchronisation trails, normally within a single SDH or PDH equipment domain.
The complete connectivity between Synchronisation element and a network element, or between two Synchronisation elements.
A network where all clocks have the same long-term accuracy under normal operating conditions.
Phase noise in the synchronisation caused by regular effects such as PLL activity or playout buffer wander.
Time is used to specify an instant (time of the day) or as a measure of time interval. NB - The words time or timing, when used to describe Synchronisation networks, usually refer to the frequency signals used for Synchronisation or measurement.
Time Error Function
The time error of a clock, with respect to a frequency standard, is the difference between the time of that clock and the frequency standard.
The time of a clock is the measure of ideal time as provided by that clock.
A system of unambiguous ordering of events. NB - This could be a succession of equal time intervals, with accurate references of the limits of these time intervals, which follow each other without any interruption since a well-defined origin. A time scale allows to date any event. For example, calendars are time scales. A frequency signal is not a â€¦
Time Slot Aligner
Where a slot aligner is used, a slip will consist of the insertion or removal of eight consecutive digit positions of a channel time slot in one or more 64 kbit /s channel . Because slips may occur on different channels at different times, special control arrangements will be necessary in switches if octet sequence integrity of multiple time slot sâ€¦
Also known as a 'Sync Loop'. This is a network condition where a slave clock providing Synchronisation becomes locked to its own timing signal. It is generally created when the slave clock Timing Information is looped back to its own input, either directly or via other network equipments. Timing loops should be prevented in networks by careful netwâ€¦
A nominally periodic signal, generated by a clock, used to control the timing of operations in digital equipments and networks. Due to unavoidable disturbances, such as oscillator phase fluctuations, actual timing signals are pseudo-periodic ones, i.e. Time intervals between successive equal phase instants show slight variations.
Traffic interfaces may be synchronous (i.e. Normally PRC-traceable) or asynchronous (e.g. Meeting the frequency offset requirements of G.703 or ETS 300 166). Network jitter and wander limits are specified in G.823 and EN 302 084 and wander is specified using the MTIE and MRTIE parameters. Input jitter and wander tolerance is also specified in G.823â€¦
A synchronous network node which interfaces with other nodes and does not directly interface with customer equipment.
Type 43 Connector
Connector for 75 ohms 2.048 MHz and 2.048 Mbit /s signals. Sometimes known as BT43 after the original BT specification.
UMTS Core Network
Refers in this specification to an evolved GSM core network infrastructure or any new UMTS core network infrastructures, integrating circuit and packet switched traffic.
A Synchronisation link where the corrective action to maintain locking is only active at one end of the link.
The long-term variations of the significant instants of a digital signal from their ideal position in time (where long-term implies that these variations are of frequency less than 10 Hz).